57 #define SLAVE_ADDRESS 0x48
58 #define NUM_OF_RX_BYTES 4
61 static volatile uint8_t RXDataIndex;
65 EUSCI_B_I2C_initSlaveParam i2cConfig = {
67 EUSCI_B_I2C_OWN_ADDRESS_OFFSET0,
68 EUSCI_B_I2C_OWN_ADDRESS_ENABLE
74 CS_setupDCO(CS_INTERNAL_RESISTOR);
78 GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P1,
79 GPIO_PIN6 | GPIO_PIN7,
80 GPIO_PRIMARY_MODULE_FUNCTION);
83 EUSCI_B_I2C_initSlave(EUSCI_B0_BASE, &i2cConfig);
86 EUSCI_B_I2C_setMode(EUSCI_B0_BASE, EUSCI_B_I2C_RECEIVE_MODE);
89 EUSCI_B_I2C_enable(EUSCI_B0_BASE);
92 EUSCI_B_I2C_clearInterrupt(EUSCI_B0_BASE,
93 EUSCI_B_I2C_RECEIVE_INTERRUPT0);
94 EUSCI_B_I2C_enableInterrupt(EUSCI_B0_BASE,
95 EUSCI_B_I2C_RECEIVE_INTERRUPT0);
98 __bis_SR_register(LPM0_bits | GIE);
101 #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
102 #pragma vector=USCI_B0_VECTOR
104 #elif defined(__GNUC__)
105 __attribute__((interrupt(USCI_B0_VECTOR)))
108 switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG)) {
109 case USCI_NONE:
break;
110 case USCI_I2C_UCALIFG:
break;
111 case USCI_I2C_UCNACKIFG:
112 case USCI_I2C_UCSTTIFG:
break;
113 case USCI_I2C_UCSTPIFG:
break;
114 case USCI_I2C_UCRXIFG3:
break;
115 case USCI_I2C_UCTXIFG3:
break;
116 case USCI_I2C_UCRXIFG2:
break;
117 case USCI_I2C_UCTXIFG2:
break;
118 case USCI_I2C_UCRXIFG1:
break;
119 case USCI_I2C_UCTXIFG1:
break;
120 case USCI_I2C_UCRXIFG0:
121 RXData[RXDataIndex++] = EUSCI_B_I2C_slaveGetData(EUSCI_B0_BASE);
129 case USCI_I2C_UCTXIFG0:
break;
130 case USCI_I2C_UCBCNTIFG:
break;
131 case USCI_I2C_UCCLTOIFG:
break;
132 case USCI_I2C_UCBIT9IFG:
break;